Differential signaling techniques are often employed to reduce the impact of noise on the clock or data signals that are distributed among various blocks on an integrated circuit. Differential signaling techniques transmit information over pairs of wires to reduce the noise on a connection by rejecting common-mode interference. Typically, two wires are routed in parallel so that they will receive the same interference. One wire, often referred to as the “P” rail, carries the signal, and the other wire often referred to as the “N” rail, carries a complementary version of the signal, so that the sum of the voltages on the two wires is always constant. The receiver processes the difference between the two signals.
Differential skew between the P and N rails can result due to slight mismatches in the circuit paths of the P and N rails. Differential skew can cause circuit malfunction. A number of techniques have been proposed or suggested to reduce differential skew. One well-known technique for attenuating differential skew employs an “enforcer” style differential buffer. For a detailed discussion of an exemplary “enforcer” style differential buffer, see, for example, U.S. Pat. No. 7,119,602, incorporated by reference herein. Generally, an “enforcer” style differential buffer connects a first relatively small CMOS inverter with its input to the P rail and its output to the N rail of a differential buffer output and a second small CMOS inverter with its input to the N rail and its output to the P rail of the same differential buffer output.
While “enforcer” style differential buffers can effectively reduce the differential skew for many applications, it has been found that such “enforcer” style differential buffers do not attenuate significant amounts of differential skew unless the two CMOS inverters connected between the P and N rails forming the output are significantly larger than the sizes of the differential buffer itself. In addition, “enforcer” style differential buffers induce switching noise on the power supply and ground nodes. Supply and ground noise is manifested as a source of added phase jitter to the output differential signal. The added phase jitter degrades signal integrity which degrades device performance or causes circuit malfunction.
A need therefore exists for improved techniques for attenuating differential skew that occurs in differential signals. A further need exists for differential skew attenuation techniques that allow for a greater range of skew attenuation than the above-described conventional “enforcer” style differential buffers.